Host Interface Description

The LL-RLP-20 and/or LL-RXR-27 module is designed to be controlled by an external microcontroller (MCU) of the user's choosing. This MCU is referred to as the external host and it communicates with the module using a point-to-point Universal Asynchronous Receive/Transmit (UART) connection. The library of commands available to pass of the UART connection (a C library), as well as the physical connection itself, are referred to as the host interface. This article describes the host interface in detail.

Message Flow

The host interface implements a master/slave protocol where the external host is "master" and the module is "slave." The protocol allows both the master and slave to initiate data exchange, although the mechanism is different for each.

The host interface supports two message types: Command Packets and Response Packets. The master always sends Command Packets, while the slave always sends Response Packets.

Message Flow

Initiation by the Master

The external host acts as the protocol master and sends one (and only one) UART Command Packet at a time. The master must wait for a Response Packet to be returned from the slave before sending another Command Packet. The slave responds within 300 ms to one Command Packet with one (and only one) Response Packet.

Initiation by the Slave

The module cannot directly initiate a UART transaction. Any unsolicited flow of data from slave to master occurs in the form of a polled interrupt request. The slave initiates a polled interrupt request by asserting the Host Interrupt General Purpose Input/Output (GPIO) line. The host interrupt line is Pin 8 of the module.

If/when the module asserts the host interrupt line, the external host uses appropriate UART Command Packets to query the reason for the interrupt, through a data field called the Host Interface Interrupt Flags (a.k.a. IRQ Flags). Depending on which flags are set, the master proceeds on a flag-specific basis, possibly issuing further commands to continue the data exchange.

The host interrupt line is asserted whenever an interrupt flag is set. It is de-asserted after the master clears all pending interrupt flags.

UART Configuration

Nominal Baud Rate

115200 bps

Data

8-bit

Parity

None

Stop Bits

1 bit

Flow Control

None

Message Format

The Command Packets sent to the module and the Response Packets it returns adhere to specific formatting. The following tables describe the format of the Command and Response Packets, respectively. Each type of packet concludes with two checksum bytes, used to verify the integrity of the packet. The compute_checksum function, used to calculate the checksum, is described below.  The command bytes themselves -- the "OP codes" -- are listed in the Link Labs Host Interface Library documentation.

Command Packet Format

Byte Number

Description

Comments

0

Wakeup preamble 0

Always equal to 0xFF

1

Wakeup preamble 1

Always equal to 0xFF

2

Wakeup preamble 2

Always equal to 0xFF

3

Wakeup preamble 3

Always equal to 0xFF

4

Start of frame

Always equal to 0xC4

5

Command Byte

Specifies which master command is contained in the message

6

Message number

8-bit number incremented by the external host. Expected roll over: 253, 254, 255, 0, 1, 2, …

7

Payload length (MSB)

Most significant byte of the payload length. Note: max payload length is 256 bytes.

8

Payload length (LSB)

Least significant byte of the payload length.

9

Payload byte 0

10

Payload byte 1

11

Payload byte 2

Payload length + 9

Checksum byte (MSB)

Most significant byte of 16-bit CRC. See the checksum section for further details.

Payload length + 10

Checksum byte (LSB)

Least significant byte of 16-bit CRC.

Response Packet Format

Byte Number

Description

Comments

0

Start of frame

Always equal 0xC4

1

Command byte

Specifies the master command to which the module is responding.

2

Message number

Specifies the message number to which the module is responding.

3

ACK byte

00 = ACK: Command Acknowledged

01 = NACK: Command not supported

02 = NACK: Incorrect checksum

03 = NACK: Payload length out of range

04 = NACK: Payload value out of range

4

Payload length (MSB)

Most significant byte representing total number of bytes in payload

5

Payload length (LSB)

Least significant byte representing total number of bytes in payload

6

Payload byte 0

7

Payload byte 1

8

Payload byte 2

Payload length + 6

Checksum byte (MSB)

Most significant byte of 16-bit checksum. See the Checksum section for further details.

Payload length + 7

Checksum byte (LSB)

Least significant byte of 16-bit checksum.

compute_checksum

The following function computes the checksum used by the Host Interface to verify the integrity of Command and Response Packets.

/**
* @brief
*   compute_checksum
*
* @param[in] buf
*   byte array to compute checksum on
*
* @param[in] len
*   size of the byte array in bytes
*
* @return
*   The 16-bit checksum
*/
static uint16_t compute_checksum(uint8_t* buf, uint16_t len) 
{
    uint16_t i;
    uint16_t crc = 0;
    for(i = 0; i < len; i++)
    {
        crc =(crc>>8)|(crc<<8); crc ^= buf[i];
        crc ^= (crc & 0xff) >> 4;
        crc ^= crc << 12;
        crc ^= (crc & 0xff) << 5;
    }
    return crc; 
}

Module Boot Sequence

The module will boot automatically when power is applied and every time the reset line is asserted and then de-asserted. The module notifies the external host that the boot sequence is complete by latching the "reset" IRQ flag and asserting the host interrupt line. The external host must wait for the reset IRQ flag before interacting with the module.

Connection Sequence (Symphony Link mode)

Connection Sequence (Symphony Link mode)

After booting in Symphony Link mode, the module automatically attempts to connect to a Symphony Link gateway. During the connection process, a factory-fresh module will search the entire available spectrum (usually 902 to 928 MHz in the US) for in-range Symphony Link gateways. This can take up to 60 seconds after reset.

If a module connects to a Symphony Link gateway, it stores the network configuration in persistent flash memory. On subsequent reboots, the module will first attempt to reconnect to the same gateway. If the gateway is absent, the module will clear the stored network configuration and search the entire available spectrum for other in-range Symphony Link gateways.

The module notifies the external host that the connection sequence is complete by asserting the host interrupt line.  The module will assert either IRQ flag "Gateway Connection Established" or "Gateway Connection Lost".  The module will assert the IRQ no later than 60 seconds after reset.

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