The host processor (UART Master) can initiate a new communications transaction at any time by sending a command packet over the UART. All communications are initiated by the master by sending 1 command packet, and waiting for a full response packet before sending another command packet. The slave responds immediately to 1 command packet with 1 response packet. The slave is guaranteed to respond with TH1 seconds. Unsolicited responses from the slave device are not allowed.
The Link Labs Module Processor (UART Slave) cannot initiate a UART transaction by sending data bytes directly. Instead, the slave processor initiates the transaction by asserting the Host Notify GPIO line. The expectation from that point forward, is that the master should immediately respond to the level change on the Host Notify line by sending a UART command to query the reason for the notification, through a command called the “Host Interface Interrupt Flags”. Based on the response to that command, the master should determine what additional actions and communication is necessary.
The Host Notify line is asserted when an interrupt flag is set in the LTE-M module, and is de-asserted when all notification flags are cleared. The host processor is responsible for clearing the interrupt flags through a UART command, which returns the Host Notify line back to the de-asserted state.