The Link Labs LTE-M module is a highly optimized for extremely low-power operation, in order to achieve a very long battery life on small form factor batteries. In order to meet these design goals, the LTE-M modules typically goes to a low-power sleep mode automatically when it deems appropriate. The host processor is required to wake up the LTE-M module (and wait for confirmation that it is awake), while UART transactions occur. A diagram of the required signal waveforms is shown below, and the sequence is described as follows:
When the host is ready to initiate a UART transaction, it does not know whether the LTE-M module is in the sleep or awake state. The host initiates the transaction by asserting the Wake Request line (1). Within TH2 seconds, the module will assert the Wake Status line (2). From that point forward, the host can safely assume that the module is awake. The module will remain awake for as long as the Wake Request line remains asserted.
Once the Wake Status has been asserted, the host can safely send a UART command (3) using byte-level flow control (4,5). Once the entire UART command is sent, the module is guaranteed to respond within TH1 seconds (6), also using byte-level flow control (7,8). Once the UART response is complete, the host can keep the module awake and send more UART commands, indefinitely.
Once the host is finished sending UART commands and receiving UART responses, it should allow the module to go back to sleep (if low power operation if desired). This is communicated by de-asserting the Wake Request line (9). At some point after this, the module will de-assert the Wake Status line (10). Once the Wake Status line is de-asserted, the host does not know whether the module is awake or asleep. This marks the end of the transaction.